There has been explosive growth in Internet traffic due to the increased number of Internet users, various service demands from those users, the implementation of new services, such as voice-over-IP (VoIP) or streaming applications, and the development of mobile Internet. Conventional routers, which act as relaying nodes connected to sub-networks or other routers, have accomplished their roles well, in situations in which the time required to process packets, determine their destinations, and forward the packets to the destinations is usually smaller than the transmission time on network paths. More recently, however, the packet transmission capabilities of high-bandwidth network paths and the increases in Internet traffic have combined to outpace the processing capacities of conventional routers.
This has led to the development of a new generation of massively parallel, distributed architecture routers. A distributed architecture router typically comprises a large number of routing nodes that are coupled to each other via a plurality of switch fabric modules and an optional crossbar switch. Each routing node has its own routing (or forwarding) table for forwarding data packets via other routing nodes to a destination address.
When a data packet arrives in a conventional routing node, a forwarding engine in the routing node uses forwarding tables to determine the destination of the data packet. A conventional Internet Protocol (IP) router uses a dedicated forwarding table for each type of traffic, such as Internet Protocol version 4 (IPv4), Internet Protocol version 6 (IPv6) and MPLS.
Conventional routers use many packet processors to route data traffic through the router. However, conventional routers typically use a single control plane processor to perform control plane functions (or operations) and management plane functions (or operations). The single control plane processor handles all management functions and all routing protocols. Some prior art routers may use two control plane processors, a primary and a secondary, for redundancy purposes. But each of these processors performs the same functionality. The primary control processor performs all control and management functions, while the secondary control processor is idle and waits for a failure of the primary control processor. Thus, the redundant processors are not used to increase the aggregate processing power and do not allow optimization of resource utilization through resource allocation.
Thus, the speed of control plane processing in prior art routers is limited by the processing power of a single processor. This fails to take advantage of parallel processing opportunities. To achieve high route update rates, expensive data processors must be used.
Therefore, there is a need in the art for improved high-speed routers. In particular, there is a need for a high-speed router in which control and management plane functions are not bottlenecked by a single control plane processor.